@opcode(<EOL><NUM_LIT>, <EOL><NUM_LIT>, <EOL>)<EOL><INDENT>def instruction_NEG_register(self, opcode, register):<DEDENT>
x = register.value<EOL>r = x * -<NUM_LIT:1> <EOL>register.set(r)<EOL><INDENT>log.debug("<STR_LIT>" % (<EOL>self.program_counter, register.name, x, r,<EOL>))<EOL><DEDENT>self.clear_NZVC()<EOL>self.update_NZVC_8(<NUM_LIT:0>, x, r)<EOL>
Replaces the register with its twos complement. The C (carry) bit
represents a borrow and is set to the inverse of the resulting binary
carry. Note that 80 16 is replaced by itself and only in this case is
the V (overflow) bit set. The value 00 16 is also replaced by itself,
and only in this case is the C (carry) bit cleared.

source code forms: NEG Q; NEGA; NEG B

CC bits "HNZVC": uaaaa