@opcode(<EOL><NUM_LIT>, <EOL>)<EOL><INDENT>def instruction_EXG(self, opcode, m):<DEDENT>
high, low = divmod(m, <NUM_LIT>)<EOL>reg1 = self._get_register_obj(high)<EOL>reg2 = self._get_register_obj(low)<EOL>new_reg1_value = convert_differend_width(reg2, reg1)<EOL>new_reg2_value = convert_differend_width(reg1, reg2)<EOL>reg1.set(new_reg1_value)<EOL>reg2.set(new_reg2_value)<EOL>
source code forms: EXG R1,R2
CC bits "HNZVC": ccccc