def find_interconnect_ports(self):
phy_port_list = self.ext_br_obj.get_port_name_list()<EOL>int_port_list = self.integ_br_obj.get_port_name_list()<EOL>for port in phy_port_list:<EOL><INDENT>is_patch = ovs_lib.is_patch(self.root_helper, port)<EOL>if is_patch:<EOL><INDENT>peer_port = ovs_lib.get_peer(self.root_helper, port)<EOL>if peer_port in int_port_list:<EOL><INDENT>return port, peer_port<EOL><DEDENT><DEDENT><DEDENT>return None, None<EOL>
Find the internal veth or patch ports.