@opcode(<EOL><NUM_LIT>, <EOL><NUM_LIT>, <EOL>)<EOL><INDENT>def instruction_INC_register(self, opcode, register):<DEDENT>
a = register.value<EOL>r = self.INC(a)<EOL>r = register.set(r)<EOL>
Adds to the register. The carry bit is not affected, thus allowing this
instruction to be used as a loop counter in multiple-precision
computations. When operating on unsigned values, only the BEQ and BNE
branches can be expected to behave consistently. When operating on twos
complement values, all signed branches are correctly available.

source code forms: INC Q; INCA; INCB

CC bits "HNZVC": -aaa-