@opcode(<NUM_LIT>, <NUM_LIT>) <EOL><INDENT>def instruction_CLR_register(self, opcode, register):<DEDENT>
register.set(<NUM_LIT>)<EOL>self.update_0100()<EOL>
Clear accumulator A or B

source code forms: CLRA; CLRB
CC bits "HNZVC": -0100