@opcode(<EOL><NUM_LIT>, <NUM_LIT>, <NUM_LIT>, <NUM_LIT>, <EOL>)<EOL><INDENT>def instruction_ADD16(self, opcode, m, register):<DEDENT>
assert register.WIDTH == <NUM_LIT:16><EOL>old = register.value<EOL>r = old + m<EOL>register.set(r)<EOL><INDENT>log.debug("<STR_LIT>" % (<EOL>self.program_counter, opcode, m,<EOL>register.name,<EOL>old, m, r<EOL>))<EOL><DEDENT>self.clear_NZVC()<EOL>self.update_NZVC_16(old, m, r)<EOL>
Adds the 16-bit memory value into the 16-bit accumulator

source code forms: ADDD P

CC bits "HNZVC": -aaaa