static void ide_sector_start_dma(IDEState *s, enum ide_dma_cmd dma_cmd)

{

    s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;

    s->io_buffer_index = 0;

    s->io_buffer_size = 0;

    s->dma_cmd = dma_cmd;



    switch (dma_cmd) {

    case IDE_DMA_READ:

        block_acct_start(bdrv_get_stats(s->bs), &s->acct,

                         s->nsector * BDRV_SECTOR_SIZE, BLOCK_ACCT_READ);

        break;

    case IDE_DMA_WRITE:

        block_acct_start(bdrv_get_stats(s->bs), &s->acct,

                         s->nsector * BDRV_SECTOR_SIZE, BLOCK_ACCT_WRITE);

        break;

    default:

        break;

    }



    ide_start_dma(s, ide_dma_cb);

}

static void ide_sector_start_dma(IDEState *s, enum ide_dma_cmd dma_cmd)

{

    s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;

    s->io_buffer_index = 0;

    s->io_buffer_size = 0;

    s->dma_cmd = dma_cmd;



    switch (dma_cmd) {

    case IDE_DMA_READ:

        block_acct_start(bdrv_get_stats(s->bs), &s->acct,

                         s->nsector * BDRV_SECTOR_SIZE, BLOCK_ACCT_READ);

        break;

    case IDE_DMA_WRITE:

        block_acct_start(bdrv_get_stats(s->bs), &s->acct,

                         s->nsector * BDRV_SECTOR_SIZE, BLOCK_ACCT_WRITE);

        break;

    default:

        break;

    }



    ide_start_dma(s, ide_dma_cb);

}

static void FUNC_0(IDEState *VAR_0, enum ide_dma_cmd VAR_1)

{

    VAR_0->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;

    VAR_0->io_buffer_index = 0;

    VAR_0->io_buffer_size = 0;

    VAR_0->VAR_1 = VAR_1;



    switch (VAR_1) {

    case IDE_DMA_READ:

        block_acct_start(bdrv_get_stats(VAR_0->bs), &VAR_0->acct,

                         VAR_0->nsector * BDRV_SECTOR_SIZE, BLOCK_ACCT_READ);

        break;

    case IDE_DMA_WRITE:

        block_acct_start(bdrv_get_stats(VAR_0->bs), &VAR_0->acct,

                         VAR_0->nsector * BDRV_SECTOR_SIZE, BLOCK_ACCT_WRITE);

        break;

    default:

        break;

    }



    ide_start_dma(VAR_0, ide_dma_cb);

}

static void FUNC_0(IDEState *VAR_0, enum ide_dma_cmd VAR_1)
{ VAR_0->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT; VAR_0->io_buffer_index = 0; VAR_0->io_buffer_size = 0; VAR_0->VAR_1 = VAR_1; switch (VAR_1) { case IDE_DMA_READ:
block_acct_start(bdrv_get_stats(VAR_0->bs), &VAR_0->acct,
VAR_0->nsector * BDRV_SECTOR_SIZE, BLOCK_ACCT_READ); break; case IDE_DMA_WRITE:
block_acct_start(bdrv_get_stats(VAR_0->bs), &VAR_0->acct,
VAR_0->nsector * BDRV_SECTOR_SIZE, BLOCK_ACCT_WRITE); break; default:
break; } ide_start_dma(VAR_0, ide_dma_cb); }