void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,

                   int asi, int size)

{

#ifdef DEBUG_ASI

    dump_asi("write", addr, asi, size, val);

#endif

    if (asi < 0x80) {

        helper_raise_exception(env, TT_PRIV_ACT);

    }



    helper_check_align(env, addr, size - 1);

    addr = asi_address_mask(env, asi, addr);



    /* Convert to little endian */

    switch (asi) {

    case 0x88: /* Primary LE */

    case 0x89: /* Secondary LE */

        switch (size) {

        case 2:

            val = bswap16(val);

            break;

        case 4:

            val = bswap32(val);

            break;

        case 8:

            val = bswap64(val);

            break;

        default:

            break;

        }

    default:

        break;

    }



    switch (asi) {

    case 0x80: /* Primary */

    case 0x88: /* Primary LE */

        {

            switch (size) {

            case 1:

                stb_raw(addr, val);

                break;

            case 2:

                stw_raw(addr, val);

                break;

            case 4:

                stl_raw(addr, val);

                break;

            case 8:

            default:

                stq_raw(addr, val);

                break;

            }

        }

        break;

    case 0x81: /* Secondary */

    case 0x89: /* Secondary LE */

        /* XXX */

        return;



    case 0x82: /* Primary no-fault, RO */

    case 0x83: /* Secondary no-fault, RO */

    case 0x8a: /* Primary no-fault LE, RO */

    case 0x8b: /* Secondary no-fault LE, RO */

    default:

        helper_raise_exception(env, TT_DATA_ACCESS);

        return;

    }

}

void helper_st_asi(CPUSPARCState *env, target_ulong addr, target_ulong val,

                   int asi, int size)

{

#ifdef DEBUG_ASI

    dump_asi("write", addr, asi, size, val);

#endif

    if (asi < 0x80) {

        helper_raise_exception(env, TT_PRIV_ACT);

    }



    helper_check_align(env, addr, size - 1);

    addr = asi_address_mask(env, asi, addr);



    

    switch (asi) {

    case 0x88: 

    case 0x89: 

        switch (size) {

        case 2:

            val = bswap16(val);

            break;

        case 4:

            val = bswap32(val);

            break;

        case 8:

            val = bswap64(val);

            break;

        default:

            break;

        }

    default:

        break;

    }



    switch (asi) {

    case 0x80: 

    case 0x88: 

        {

            switch (size) {

            case 1:

                stb_raw(addr, val);

                break;

            case 2:

                stw_raw(addr, val);

                break;

            case 4:

                stl_raw(addr, val);

                break;

            case 8:

            default:

                stq_raw(addr, val);

                break;

            }

        }

        break;

    case 0x81: 

    case 0x89: 

        

        return;



    case 0x82: 

    case 0x83: 

    case 0x8a: 

    case 0x8b: 

    default:

        helper_raise_exception(env, TT_DATA_ACCESS);

        return;

    }

}

                stb_raw(addr, val);                 stw_raw(addr, val);                 stl_raw(addr, val);                 stq_raw(addr, val);
void FUNC_0(CPUSPARCState *VAR_0, target_ulong VAR_1, target_ulong VAR_2,

                   int VAR_3, int VAR_4)

{

#ifdef DEBUG_ASI

    dump_asi("write", VAR_1, VAR_3, VAR_4, VAR_2);

#endif

    if (VAR_3 < 0x80) {

        helper_raise_exception(VAR_0, TT_PRIV_ACT);

    }



    helper_check_align(VAR_0, VAR_1, VAR_4 - 1);

    VAR_1 = asi_address_mask(VAR_0, VAR_3, VAR_1);



    

    switch (VAR_3) {

    case 0x88: 

    case 0x89: 

        switch (VAR_4) {

        case 2:

            VAR_2 = bswap16(VAR_2);

            break;

        case 4:

            VAR_2 = bswap32(VAR_2);

            break;

        case 8:

            VAR_2 = bswap64(VAR_2);

            break;

        default:

            break;

        }

    default:

        break;

    }



    switch (VAR_3) {

    case 0x80: 

    case 0x88: 

        {

            switch (VAR_4) {

            case 1:

                stb_raw(VAR_1, VAR_2);

                break;

            case 2:

                stw_raw(VAR_1, VAR_2);

                break;

            case 4:

                stl_raw(VAR_1, VAR_2);

                break;

            case 8:

            default:

                stq_raw(VAR_1, VAR_2);

                break;

            }

        }

        break;

    case 0x81: 

    case 0x89: 

        

        return;



    case 0x82: 

    case 0x83: 

    case 0x8a: 

    case 0x8b: 

    default:

        helper_raise_exception(VAR_0, TT_DATA_ACCESS);

        return;

    }

}

void FUNC_0(CPUSPARCState *VAR_0, target_ulong VAR_1, target_ulong VAR_2,
int VAR_3, int VAR_4)
{ #ifdef DEBUG_ASI
dump_asi("write", VAR_1, VAR_3, VAR_4, VAR_2); #endif
if (VAR_3 < 0x80) { helper_raise_exception(VAR_0, TT_PRIV_ACT); } helper_check_align(VAR_0, VAR_1, VAR_4 - 1); VAR_1 = asi_address_mask(VAR_0, VAR_3, VAR_1); switch (VAR_3) { case 0x88:
case 0x89:
switch (VAR_4) { case 2:
VAR_2 = bswap16(VAR_2); break; case 4:
VAR_2 = bswap32(VAR_2); break; case 8:
VAR_2 = bswap64(VAR_2); break; default:
break; } default:
break; } switch (VAR_3) { case 0x80:
case 0x88:
{ switch (VAR_4) { case 1:
stb_raw(VAR_1, VAR_2); break; case 2:
stw_raw(VAR_1, VAR_2); break; case 4:
stl_raw(VAR_1, VAR_2); break; case 8:
default:
stq_raw(VAR_1, VAR_2); break; } } break; case 0x81:
case 0x89:
return; case 0x82:
case 0x83:
case 0x8a:
case 0x8b:
default:
helper_raise_exception(VAR_0, TT_DATA_ACCESS); return; } }