static void channel_store_d(struct fs_dma_ctrl *ctrl, int c)

{

	target_phys_addr_t addr = channel_reg(ctrl, c, RW_SAVED_DATA);



	/* Encode and store. FIXME: handle endianness.  */

	D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));

	cpu_physical_memory_write (addr,

				  (void *) &ctrl->channels[c].current_d, 

				  sizeof ctrl->channels[c].current_d);

}

static void channel_store_d(struct fs_dma_ctrl *ctrl, int c)

{

	target_phys_addr_t addr = channel_reg(ctrl, c, RW_SAVED_DATA);



	

	D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, c, addr));

	cpu_physical_memory_write (addr,

				  (void *) &ctrl->channels[c].current_d, 

				  sizeof ctrl->channels[c].current_d);

}

static void FUNC_0(struct fs_dma_ctrl *VAR_0, int VAR_1)

{

	target_phys_addr_t addr = channel_reg(VAR_0, VAR_1, RW_SAVED_DATA);



	

	D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, VAR_1, addr));

	cpu_physical_memory_write (addr,

				  (void *) &VAR_0->channels[VAR_1].current_d, 

				  sizeof VAR_0->channels[VAR_1].current_d);

}

static void FUNC_0(struct fs_dma_ctrl *VAR_0, int VAR_1)
{ target_phys_addr_t addr = channel_reg(VAR_0, VAR_1, RW_SAVED_DATA); D(printf("%s ch=%d addr=" TARGET_FMT_plx "\n", __func__, VAR_1, addr)); cpu_physical_memory_write (addr,
(void *) &VAR_0->channels[VAR_1].current_d,
sizeof VAR_0->channels[VAR_1].current_d); }