int iommu_dma_memory_rw(DMAContext *dma, dma_addr_t addr,

                        void *buf, dma_addr_t len, DMADirection dir)

{

    target_phys_addr_t paddr, plen;

    int err;



#ifdef DEBUG_IOMMU

    fprintf(stderr, "dma_memory_rw context=%p addr=0x" DMA_ADDR_FMT " len=0x"

            DMA_ADDR_FMT " dir=%d\n", dma, addr, len, dir);

#endif



    while (len) {

        err = dma->translate(dma, addr, &paddr, &plen, dir);

        if (err) {

	    /*

             * In case of failure on reads from the guest, we clean the

             * destination buffer so that a device that doesn't test

             * for errors will not expose qemu internal memory.

	     */

	    memset(buf, 0, len);

            return -1;

        }



        /* The translation might be valid for larger regions. */

        if (plen > len) {

            plen = len;

        }



        address_space_rw(dma->as, paddr, buf, plen, dir == DMA_DIRECTION_FROM_DEVICE);



        len -= plen;

        addr += plen;

        buf += plen;

    }



    return 0;

}

int iommu_dma_memory_rw(DMAContext *dma, dma_addr_t addr,

                        void *buf, dma_addr_t len, DMADirection dir)

{

    target_phys_addr_t paddr, plen;

    int err;



#ifdef DEBUG_IOMMU

    fprintf(stderr, "dma_memory_rw context=%p addr=0x" DMA_ADDR_FMT " len=0x"

            DMA_ADDR_FMT " dir=%d\n", dma, addr, len, dir);

#endif



    while (len) {

        err = dma->translate(dma, addr, &paddr, &plen, dir);

        if (err) {

	    









	    memset(buf, 0, len);

            return -1;

        }



        

        if (plen > len) {

            plen = len;

        }



        address_space_rw(dma->as, paddr, buf, plen, dir == DMA_DIRECTION_FROM_DEVICE);



        len -= plen;

        addr += plen;

        buf += plen;

    }



    return 0;

}

int FUNC_0(DMAContext *VAR_0, dma_addr_t VAR_1,

                        void *VAR_2, dma_addr_t VAR_3, DMADirection VAR_4)

{

    target_phys_addr_t paddr, plen;

    int VAR_5;



#ifdef DEBUG_IOMMU

    fprintf(stderr, "dma_memory_rw context=%p VAR_1=0x" DMA_ADDR_FMT " VAR_3=0x"

            DMA_ADDR_FMT " VAR_4=%d\n", VAR_0, VAR_1, VAR_3, VAR_4);

#endif



    while (VAR_3) {

        VAR_5 = VAR_0->translate(VAR_0, VAR_1, &paddr, &plen, VAR_4);

        if (VAR_5) {

	    









	    memset(VAR_2, 0, VAR_3);

            return -1;

        }



        

        if (plen > VAR_3) {

            plen = VAR_3;

        }



        address_space_rw(VAR_0->as, paddr, VAR_2, plen, VAR_4 == DMA_DIRECTION_FROM_DEVICE);



        VAR_3 -= plen;

        VAR_1 += plen;

        VAR_2 += plen;

    }



    return 0;

}

int FUNC_0(DMAContext *VAR_0, dma_addr_t VAR_1,
void *VAR_2, dma_addr_t VAR_3, DMADirection VAR_4)
{ target_phys_addr_t paddr, plen; int VAR_5; #ifdef DEBUG_IOMMU
fprintf(stderr, "dma_memory_rw context=%p VAR_1=0x" DMA_ADDR_FMT " VAR_3=0x"
DMA_ADDR_FMT " VAR_4=%d\n", VAR_0, VAR_1, VAR_3, VAR_4); #endif
while (VAR_3) { VAR_5 = VAR_0->translate(VAR_0, VAR_1, &paddr, &plen, VAR_4); if (VAR_5) { memset(VAR_2, 0, VAR_3); return -1; } if (plen > VAR_3) { plen = VAR_3; } address_space_rw(VAR_0->as, paddr, VAR_2, plen, VAR_4 == DMA_DIRECTION_FROM_DEVICE); VAR_3 -= plen; VAR_1 += plen; VAR_2 += plen; } return 0; }