static void exynos4210_pmu_write(void *opaque, target_phys_addr_t offset,

                                 uint64_t val, unsigned size)

{

    Exynos4210PmuState *s = (Exynos4210PmuState *)opaque;

    unsigned i;

    const Exynos4210PmuReg *reg_p = exynos4210_pmu_regs;



    for (i = 0; i < PMU_NUM_OF_REGISTERS; i++) {

        if (reg_p->offset == offset) {

            PRINT_DEBUG_EXTEND("%s <0x%04x> <- 0x%04x\n", reg_p->name,

                    (uint32_t)offset, (uint32_t)val);

            s->reg[i] = val;

            return;

        }

        reg_p++;

    }

    PRINT_DEBUG("QEMU PMU ERROR: bad write offset 0x%04x\n", (uint32_t)offset);

}

static void exynos4210_pmu_write(void *opaque, target_phys_addr_t offset,

                                 uint64_t val, unsigned size)

{

    Exynos4210PmuState *s = (Exynos4210PmuState *)opaque;

    unsigned i;

    const Exynos4210PmuReg *reg_p = exynos4210_pmu_regs;



    for (i = 0; i < PMU_NUM_OF_REGISTERS; i++) {

        if (reg_p->offset == offset) {

            PRINT_DEBUG_EXTEND("%s <0x%04x> <- 0x%04x\n", reg_p->name,

                    (uint32_t)offset, (uint32_t)val);

            s->reg[i] = val;

            return;

        }

        reg_p++;

    }

    PRINT_DEBUG("QEMU PMU ERROR: bad write offset 0x%04x\n", (uint32_t)offset);

}

static void FUNC_0(void *VAR_0, target_phys_addr_t VAR_1,

                                 uint64_t VAR_2, unsigned VAR_3)

{

    Exynos4210PmuState *s = (Exynos4210PmuState *)VAR_0;

    unsigned VAR_4;

    const Exynos4210PmuReg *VAR_5 = exynos4210_pmu_regs;



    for (VAR_4 = 0; VAR_4 < PMU_NUM_OF_REGISTERS; VAR_4++) {

        if (VAR_5->VAR_1 == VAR_1) {

            PRINT_DEBUG_EXTEND("%s <0x%04x> <- 0x%04x\n", VAR_5->name,

                    (uint32_t)VAR_1, (uint32_t)VAR_2);

            s->reg[VAR_4] = VAR_2;

            return;

        }

        VAR_5++;

    }

    PRINT_DEBUG("QEMU PMU ERROR: bad write VAR_1 0x%04x\n", (uint32_t)VAR_1);

}

static void FUNC_0(void *VAR_0, target_phys_addr_t VAR_1,
uint64_t VAR_2, unsigned VAR_3)
{ Exynos4210PmuState *s = (Exynos4210PmuState *)VAR_0; unsigned VAR_4; const Exynos4210PmuReg *VAR_5 = exynos4210_pmu_regs; for (VAR_4 = 0; VAR_4 < PMU_NUM_OF_REGISTERS; VAR_4++) { if (VAR_5->VAR_1 == VAR_1) { PRINT_DEBUG_EXTEND("%s <0x%04x> <- 0x%04x\n", VAR_5->name,
(uint32_t)VAR_1, (uint32_t)VAR_2); s->reg[VAR_4] = VAR_2; return; } VAR_5++; } PRINT_DEBUG("QEMU PMU ERROR: bad write VAR_1 0x%04x\n", (uint32_t)VAR_1); }