static int kvm_get_xsave(X86CPU *cpu)

{

    CPUX86State *env = &cpu->env;

    struct kvm_xsave* xsave = env->kvm_xsave_buf;

    int ret, i;

    const uint8_t *xmm, *ymmh, *zmmh;

    uint16_t cwd, swd, twd;



    if (!kvm_has_xsave()) {

        return kvm_get_fpu(cpu);

    }



    ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_XSAVE, xsave);

    if (ret < 0) {

        return ret;

    }



    cwd = (uint16_t)xsave->region[XSAVE_FCW_FSW];

    swd = (uint16_t)(xsave->region[XSAVE_FCW_FSW] >> 16);

    twd = (uint16_t)xsave->region[XSAVE_FTW_FOP];

    env->fpop = (uint16_t)(xsave->region[XSAVE_FTW_FOP] >> 16);

    env->fpstt = (swd >> 11) & 7;

    env->fpus = swd;

    env->fpuc = cwd;

    for (i = 0; i < 8; ++i) {

        env->fptags[i] = !((twd >> i) & 1);

    }

    memcpy(&env->fpip, &xsave->region[XSAVE_CWD_RIP], sizeof(env->fpip));

    memcpy(&env->fpdp, &xsave->region[XSAVE_CWD_RDP], sizeof(env->fpdp));

    env->mxcsr = xsave->region[XSAVE_MXCSR];

    memcpy(env->fpregs, &xsave->region[XSAVE_ST_SPACE],

            sizeof env->fpregs);

    env->xstate_bv = *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV];

    memcpy(env->bnd_regs, &xsave->region[XSAVE_BNDREGS],

            sizeof env->bnd_regs);

    memcpy(&env->bndcs_regs, &xsave->region[XSAVE_BNDCSR],

            sizeof(env->bndcs_regs));

    memcpy(env->opmask_regs, &xsave->region[XSAVE_OPMASK],

            sizeof env->opmask_regs);



    xmm = (const uint8_t *)&xsave->region[XSAVE_XMM_SPACE];

    ymmh = (const uint8_t *)&xsave->region[XSAVE_YMMH_SPACE];

    zmmh = (const uint8_t *)&xsave->region[XSAVE_ZMM_Hi256];

    for (i = 0; i < CPU_NB_REGS; i++, xmm += 16, ymmh += 16, zmmh += 32) {

        env->xmm_regs[i].XMM_Q(0) = ldq_p(xmm);

        env->xmm_regs[i].XMM_Q(1) = ldq_p(xmm+8);

        env->xmm_regs[i].XMM_Q(2) = ldq_p(ymmh);

        env->xmm_regs[i].XMM_Q(3) = ldq_p(ymmh+8);

        env->xmm_regs[i].XMM_Q(4) = ldq_p(zmmh);

        env->xmm_regs[i].XMM_Q(5) = ldq_p(zmmh+8);

        env->xmm_regs[i].XMM_Q(6) = ldq_p(zmmh+16);

        env->xmm_regs[i].XMM_Q(7) = ldq_p(zmmh+24);

    }



#ifdef TARGET_X86_64

    memcpy(&env->xmm_regs[16], &xsave->region[XSAVE_Hi16_ZMM],

           16 * sizeof env->xmm_regs[16]);

#endif

    return 0;

}

static int kvm_get_xsave(X86CPU *cpu)

{

    CPUX86State *env = &cpu->env;

    struct kvm_xsave* xsave = env->kvm_xsave_buf;

    int ret, i;

    const uint8_t *xmm, *ymmh, *zmmh;

    uint16_t cwd, swd, twd;



    if (!kvm_has_xsave()) {

        return kvm_get_fpu(cpu);

    }



    ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_XSAVE, xsave);

    if (ret < 0) {

        return ret;

    }



    cwd = (uint16_t)xsave->region[XSAVE_FCW_FSW];

    swd = (uint16_t)(xsave->region[XSAVE_FCW_FSW] >> 16);

    twd = (uint16_t)xsave->region[XSAVE_FTW_FOP];

    env->fpop = (uint16_t)(xsave->region[XSAVE_FTW_FOP] >> 16);

    env->fpstt = (swd >> 11) & 7;

    env->fpus = swd;

    env->fpuc = cwd;

    for (i = 0; i < 8; ++i) {

        env->fptags[i] = !((twd >> i) & 1);

    }

    memcpy(&env->fpip, &xsave->region[XSAVE_CWD_RIP], sizeof(env->fpip));

    memcpy(&env->fpdp, &xsave->region[XSAVE_CWD_RDP], sizeof(env->fpdp));

    env->mxcsr = xsave->region[XSAVE_MXCSR];

    memcpy(env->fpregs, &xsave->region[XSAVE_ST_SPACE],

            sizeof env->fpregs);

    env->xstate_bv = *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV];

    memcpy(env->bnd_regs, &xsave->region[XSAVE_BNDREGS],

            sizeof env->bnd_regs);

    memcpy(&env->bndcs_regs, &xsave->region[XSAVE_BNDCSR],

            sizeof(env->bndcs_regs));

    memcpy(env->opmask_regs, &xsave->region[XSAVE_OPMASK],

            sizeof env->opmask_regs);



    xmm = (const uint8_t *)&xsave->region[XSAVE_XMM_SPACE];

    ymmh = (const uint8_t *)&xsave->region[XSAVE_YMMH_SPACE];

    zmmh = (const uint8_t *)&xsave->region[XSAVE_ZMM_Hi256];

    for (i = 0; i < CPU_NB_REGS; i++, xmm += 16, ymmh += 16, zmmh += 32) {

        env->xmm_regs[i].XMM_Q(0) = ldq_p(xmm);

        env->xmm_regs[i].XMM_Q(1) = ldq_p(xmm+8);

        env->xmm_regs[i].XMM_Q(2) = ldq_p(ymmh);

        env->xmm_regs[i].XMM_Q(3) = ldq_p(ymmh+8);

        env->xmm_regs[i].XMM_Q(4) = ldq_p(zmmh);

        env->xmm_regs[i].XMM_Q(5) = ldq_p(zmmh+8);

        env->xmm_regs[i].XMM_Q(6) = ldq_p(zmmh+16);

        env->xmm_regs[i].XMM_Q(7) = ldq_p(zmmh+24);

    }



#ifdef TARGET_X86_64

    memcpy(&env->xmm_regs[16], &xsave->region[XSAVE_Hi16_ZMM],

           16 * sizeof env->xmm_regs[16]);

#endif

    return 0;

}

static int FUNC_0(X86CPU *VAR_0)

{

    CPUX86State *env = &VAR_0->env;

    struct kvm_xsave* VAR_1 = env->kvm_xsave_buf;

    int VAR_2, VAR_3;

    const uint8_t *VAR_4, *ymmh, *zmmh;

    uint16_t cwd, swd, twd;



    if (!kvm_has_xsave()) {

        return kvm_get_fpu(VAR_0);

    }



    VAR_2 = kvm_vcpu_ioctl(CPU(VAR_0), KVM_GET_XSAVE, VAR_1);

    if (VAR_2 < 0) {

        return VAR_2;

    }



    cwd = (uint16_t)VAR_1->region[XSAVE_FCW_FSW];

    swd = (uint16_t)(VAR_1->region[XSAVE_FCW_FSW] >> 16);

    twd = (uint16_t)VAR_1->region[XSAVE_FTW_FOP];

    env->fpop = (uint16_t)(VAR_1->region[XSAVE_FTW_FOP] >> 16);

    env->fpstt = (swd >> 11) & 7;

    env->fpus = swd;

    env->fpuc = cwd;

    for (VAR_3 = 0; VAR_3 < 8; ++VAR_3) {

        env->fptags[VAR_3] = !((twd >> VAR_3) & 1);

    }

    memcpy(&env->fpip, &VAR_1->region[XSAVE_CWD_RIP], sizeof(env->fpip));

    memcpy(&env->fpdp, &VAR_1->region[XSAVE_CWD_RDP], sizeof(env->fpdp));

    env->mxcsr = VAR_1->region[XSAVE_MXCSR];

    memcpy(env->fpregs, &VAR_1->region[XSAVE_ST_SPACE],

            sizeof env->fpregs);

    env->xstate_bv = *(uint64_t *)&VAR_1->region[XSAVE_XSTATE_BV];

    memcpy(env->bnd_regs, &VAR_1->region[XSAVE_BNDREGS],

            sizeof env->bnd_regs);

    memcpy(&env->bndcs_regs, &VAR_1->region[XSAVE_BNDCSR],

            sizeof(env->bndcs_regs));

    memcpy(env->opmask_regs, &VAR_1->region[XSAVE_OPMASK],

            sizeof env->opmask_regs);



    VAR_4 = (const uint8_t *)&VAR_1->region[XSAVE_XMM_SPACE];

    ymmh = (const uint8_t *)&VAR_1->region[XSAVE_YMMH_SPACE];

    zmmh = (const uint8_t *)&VAR_1->region[XSAVE_ZMM_Hi256];

    for (VAR_3 = 0; VAR_3 < CPU_NB_REGS; VAR_3++, VAR_4 += 16, ymmh += 16, zmmh += 32) {

        env->xmm_regs[VAR_3].XMM_Q(0) = ldq_p(VAR_4);

        env->xmm_regs[VAR_3].XMM_Q(1) = ldq_p(VAR_4+8);

        env->xmm_regs[VAR_3].XMM_Q(2) = ldq_p(ymmh);

        env->xmm_regs[VAR_3].XMM_Q(3) = ldq_p(ymmh+8);

        env->xmm_regs[VAR_3].XMM_Q(4) = ldq_p(zmmh);

        env->xmm_regs[VAR_3].XMM_Q(5) = ldq_p(zmmh+8);

        env->xmm_regs[VAR_3].XMM_Q(6) = ldq_p(zmmh+16);

        env->xmm_regs[VAR_3].XMM_Q(7) = ldq_p(zmmh+24);

    }



#ifdef TARGET_X86_64

    memcpy(&env->xmm_regs[16], &VAR_1->region[XSAVE_Hi16_ZMM],

           16 * sizeof env->xmm_regs[16]);

#endif

    return 0;

}

static int FUNC_0(X86CPU *VAR_0)
{ CPUX86State *env = &VAR_0->env; struct kvm_xsave* VAR_1 = env->kvm_xsave_buf; int VAR_2, VAR_3; const uint8_t *VAR_4, *ymmh, *zmmh; uint16_t cwd, swd, twd; if (!kvm_has_xsave()) { return kvm_get_fpu(VAR_0); } VAR_2 = kvm_vcpu_ioctl(CPU(VAR_0), KVM_GET_XSAVE, VAR_1); if (VAR_2 < 0) { return VAR_2; } cwd = (uint16_t)VAR_1->region[XSAVE_FCW_FSW]; swd = (uint16_t)(VAR_1->region[XSAVE_FCW_FSW] >> 16); twd = (uint16_t)VAR_1->region[XSAVE_FTW_FOP]; env->fpop = (uint16_t)(VAR_1->region[XSAVE_FTW_FOP] >> 16); env->fpstt = (swd >> 11) & 7; env->fpus = swd; env->fpuc = cwd; for (VAR_3 = 0; VAR_3 < 8; ++VAR_3) { env->fptags[VAR_3] = !((twd >> VAR_3) & 1); } memcpy(&env->fpip, &VAR_1->region[XSAVE_CWD_RIP], sizeof(env->fpip)); memcpy(&env->fpdp, &VAR_1->region[XSAVE_CWD_RDP], sizeof(env->fpdp)); env->mxcsr = VAR_1->region[XSAVE_MXCSR]; memcpy(env->fpregs, &VAR_1->region[XSAVE_ST_SPACE],
sizeof env->fpregs); env->xstate_bv = *(uint64_t *)&VAR_1->region[XSAVE_XSTATE_BV]; memcpy(env->bnd_regs, &VAR_1->region[XSAVE_BNDREGS],
sizeof env->bnd_regs); memcpy(&env->bndcs_regs, &VAR_1->region[XSAVE_BNDCSR],
sizeof(env->bndcs_regs)); memcpy(env->opmask_regs, &VAR_1->region[XSAVE_OPMASK],
sizeof env->opmask_regs); VAR_4 = (const uint8_t *)&VAR_1->region[XSAVE_XMM_SPACE]; ymmh = (const uint8_t *)&VAR_1->region[XSAVE_YMMH_SPACE]; zmmh = (const uint8_t *)&VAR_1->region[XSAVE_ZMM_Hi256]; for (VAR_3 = 0; VAR_3 < CPU_NB_REGS; VAR_3++, VAR_4 += 16, ymmh += 16, zmmh += 32) { env->xmm_regs[VAR_3].XMM_Q(0) = ldq_p(VAR_4); env->xmm_regs[VAR_3].XMM_Q(1) = ldq_p(VAR_4+8); env->xmm_regs[VAR_3].XMM_Q(2) = ldq_p(ymmh); env->xmm_regs[VAR_3].XMM_Q(3) = ldq_p(ymmh+8); env->xmm_regs[VAR_3].XMM_Q(4) = ldq_p(zmmh); env->xmm_regs[VAR_3].XMM_Q(5) = ldq_p(zmmh+8); env->xmm_regs[VAR_3].XMM_Q(6) = ldq_p(zmmh+16); env->xmm_regs[VAR_3].XMM_Q(7) = ldq_p(zmmh+24); } #ifdef TARGET_X86_64
memcpy(&env->xmm_regs[16], &VAR_1->region[XSAVE_Hi16_ZMM],
16 * sizeof env->xmm_regs[16]); #endif
return 0; }