static int pl061_init(SysBusDevice *dev, const unsigned char *id)

{

    int iomemtype;

    pl061_state *s = FROM_SYSBUS(pl061_state, dev);

    s->id = id;

    iomemtype = cpu_register_io_memory(pl061_readfn,

                                       pl061_writefn, s,

                                       DEVICE_NATIVE_ENDIAN);

    sysbus_init_mmio(dev, 0x1000, iomemtype);

    sysbus_init_irq(dev, &s->irq);

    qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);

    qdev_init_gpio_out(&dev->qdev, s->out, 8);

    pl061_reset(s);

    register_savevm(&dev->qdev, "pl061_gpio", -1, 1, pl061_save, pl061_load, s);

    return 0;

}

static int pl061_init(SysBusDevice *dev, const unsigned char *id)

{

    int iomemtype;

    pl061_state *s = FROM_SYSBUS(pl061_state, dev);

    s->id = id;

    iomemtype = cpu_register_io_memory(pl061_readfn,

                                       pl061_writefn, s,

                                       DEVICE_NATIVE_ENDIAN);

    sysbus_init_mmio(dev, 0x1000, iomemtype);

    sysbus_init_irq(dev, &s->irq);

    qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);

    qdev_init_gpio_out(&dev->qdev, s->out, 8);

    pl061_reset(s);

    register_savevm(&dev->qdev, "pl061_gpio", -1, 1, pl061_save, pl061_load, s);

    return 0;

}

static int FUNC_0(SysBusDevice *VAR_0, const unsigned char *VAR_1)

{

    int VAR_2;

    pl061_state *s = FROM_SYSBUS(pl061_state, VAR_0);

    s->VAR_1 = VAR_1;

    VAR_2 = cpu_register_io_memory(pl061_readfn,

                                       pl061_writefn, s,

                                       DEVICE_NATIVE_ENDIAN);

    sysbus_init_mmio(VAR_0, 0x1000, VAR_2);

    sysbus_init_irq(VAR_0, &s->irq);

    qdev_init_gpio_in(&VAR_0->qdev, pl061_set_irq, 8);

    qdev_init_gpio_out(&VAR_0->qdev, s->out, 8);

    pl061_reset(s);

    register_savevm(&VAR_0->qdev, "pl061_gpio", -1, 1, pl061_save, pl061_load, s);

    return 0;

}

static int FUNC_0(SysBusDevice *VAR_0, const unsigned char *VAR_1)
{ int VAR_2; pl061_state *s = FROM_SYSBUS(pl061_state, VAR_0); s->VAR_1 = VAR_1; VAR_2 = cpu_register_io_memory(pl061_readfn,
pl061_writefn, s,
DEVICE_NATIVE_ENDIAN); sysbus_init_mmio(VAR_0, 0x1000, VAR_2); sysbus_init_irq(VAR_0, &s->irq); qdev_init_gpio_in(&VAR_0->qdev, pl061_set_irq, 8); qdev_init_gpio_out(&VAR_0->qdev, s->out, 8); pl061_reset(s); register_savevm(&VAR_0->qdev, "pl061_gpio", -1, 1, pl061_save, pl061_load, s); return 0; }